Jitter is deviation of an actual timing edge from an ideal timing edge in a sequence of data that typically occurs at high frequencies. Jitter in a digital system is essentially a timing error that can affect timing allocation within a bit cell, for example. Jitter is typically measured at the differential zero crossings for balanced electrical signals, at the average voltage level for unbalanced signals, and at the average optical power level for optical signals. Jitter is often used as a figure of merit, and tracking jitter-induced errors over a period of time can provide an indication of system stability.
In clock recovery circuits, jitter compensation can be effected using a delay-locked loop (DLL). For example, a DLL-based clock-and-data recovery (CDR) circuit consists of a phase detector, a loop filter and a phase rotator. The objective of the DLL is to make the phase of a recovered clock track jitter on an input data signal. Generally, the phase detector generates a phase error signal, indicating a phase difference between an input data signal and the recovered clock. The loop filter uses the phase error signal to update a phase control signal with the goal of aligning a recovered clock with the input data signal. The phase rotator receives the phase control signal and the reference clock, and adjusts the phase of the reference clock using the phase control signal to generate the recovered clock. The recovered clock is provided to the phase detector for comparison with the input data signal, completing the cycle.
In a digital implementation, for example, the loop filter may be implemented using a digital signal processor (DSP), which includes at least a digital integrator for a first-order DLL. In conventional systems, the DSP operates at a much lower frequency than the phase detector for ease of implementation. Operation at the lower frequency may result in undesired and substantial latency in the DLL. The latency is generally manifest in a lapse between the determination of the phase error by the phase detector and the phase shift provided by the phase rotator.
Due to this latency in the DLL, the frequency-domain observed jitter transfer function (OJTF), which is essentially the phase transfer function from the input data signal to the phase error signal, may exhibit peaking. At high jitter frequencies (e.g., jitter in the input data signal having a frequency of about one percent of the data frequency and above), the phase difference between the input data signal and the recovered clock signal may be amplified. As such, and especially at higher frequency operation, the DLL actually amplifies rather than suppresses jitter of certain frequencies.